With the increasing down scaling of integrated circuits and increasingly higher requirements for integrated circuits, transistors need to have higher drive currents with increasingly smaller dimensions. Fin field-effect transistors (FinFETs) were thus developed.
As is known in the art, the drive currents of MOS transistors may benefit from the stresses in the channel regions of the MOS transistors. Therefore, the source and drain regions of the FinFET may be formed by removing portions of the respective fin not covered by the gate electrode, and re-growing SiGe or SiC in the spaces left by the removed fin. The re-grown SiGe or SiC are used to form source and drain regions. The re-grown source and drain regions may also have the benefit of reducing the source/drain resistance if the re-grown source/drain regions are in-situ doped with impurities in the re-growth process.
The re-growth of the source/drain regions, however, suffers from drawbacks. In contrast to conventional planar devices, the re-growth of the source/drain regions is not confined by shallow trench isolation regions, and hence the width of the re-grown SiGe is not limited. Since SiGe has a growth rate smaller on (111) planes than on other planes, the re-grown source/drain regions may not have a rectangular shape as that of the original fin. Instead, the re-grown SiGe regions may extend laterally and form facets. This may cause the reduction in the distance between a re-grown SiGe region and a re-grown SiGe region of a neighboring FinFET. Accordingly, the merging window, in which the neighboring re-growing source/drain regions will not merge, is reduced.